VOLUME 8 – NÚMERO 1 – ANO 2008

Microelectronics Students Forum 2008

September 1th to 4th, 2008
Gramado, RS - Brazil

CORPO EDITORIAL

Marcelo Lubaszewski – UFRGS
Coordenador geral do evento

Fernando Rangel – UFRN
Coordenador de Programa

Salvador Gimenez – FEI
Coordenador de Programa

ARTIGOS

A CORE FOR NETWORK-ON-CHIP LATENCY-BASED PERFORMANCE ANALYSIS
Miklécio Costa and Ivan Silva

A DIDACTIC CHIP FOR USE IN INTRODUCTORY MICROELECTRONICS COURSES
Francisco Júnior and Fernando Sousa

A RECONFIGURABLE MC-DS-CDMA DIGITAL TRANSMITTER FOR SDR MOBILE TERMINALS
Oscar Igor Robles Palacios, Jorge Vicente De La Cruz Marín and Roddy Alexander Romero Antayhua

A ROBOTIC PLATFORM BASED IN FPGA FOR EDUCATIONAL APPLICATIONS
Felipe Sanches Gurgel and Marcos Banheti Rabello Vallim

A SIMPLE MODEL TO ESTIMATE INTRINSIC POWER CONSUMPTION IN CMOS LOGIC GATES
Erasmo J. D. Chiappetta Filho, Paulo F. Butzen, Leomar S. da Rosa Jr., André I. Reis and Renato P. Ribas

A TREE-BASED TRANSISTOR GATE MATCHING SOLUTION FOR EFFICIENT LAYOUT IMPLEMENTATION
Diogo da Silva, Fábio Pereira, Leomar da Rosa Jr., André Reis and Renato Ribas

AN EXTENSION OF THE PETSC FOR RECONFIGURABLE COMPUTER SYSTEMS: BLAS ON RASC.
João Cleber Libório and Manoel Lima

AN INTERFACE FOR NOC-BASED VIRTUAL PLATFORMS SIMULATION
Camila Oliveira, Silvio Fernandes, Bruno Oliveira and Ivan Silva

ANALOG INTEGRATED CIRCUITS DESIGN BY MEANS OF GENETIC ALGORITHMS
Thiago Turcato do Rego, Salvador Pinillos Gimenez and Carlos Eduardo Thomaz

ANALYSIS OF MOSFETS ASSOCIATIONS INFLUENCE IN POST-LAYOUT SIMULATIONS
João Paulo Marinho Dantas and Fernando Rangel de Sousa

ARCHITECTURAL TEMPLATES FOR THE 4X4 TRANSFORMS OF THE H.264/AVC STANDARD TARGETING THE INTRA PREDICTION CODER
Felipe Sampaio, Robson Dornelles, Daniel Palomino, Guilherme Corrêa, Diego Noble and Luciano Agostini

AUTOMATED TEST BENCH FOR OPERATIONAL AMPLIFIERS
Leandro Mota, Abrahão Fontes and Fernando Sousa

AUTOMATIC GENERATION OF WAGON WHEEL SHAPE PATTERN FOR 2D ANISOTROPIC ETCHING SIMULATION
Rafael Hansen da Silva, Carlos Eduardo Klock, André Inacio Reis and Renato Perez Ribas

AUTOMATIC SYNTHESIS OF ANALOG BASIC BLOCKS USING A SIMULATED-BASED ALGORITHM AND COMPACT MOSFET MODEL
Lucas Compassi Severo and Alessandro Gonçalves Girardi

BEHAVIORAL MODELING OF NEURONAL ACTION POTENTIALS USING VERILOG-AMS
Leonardo Enzo Silva and Fernando Sousa

CROSSBUS: A PROGRAMMING MODEL AWARE NOC
Gabriel Oshiro Zardo and Dominique Houzet

MEMORY ASPECTS OF DUAL CORE PROCESSOR DESIGN
Thiago Nunes Coelho Cardoso, Celina Gomes do Val, José Augusto Nacif, Antônio Otávio Fernandes and Claudionor Nunes Coelho Jr.

DESIGN OF A CMOS OPERATIONAL AMPLIFIER
Abrahão Fontes, Leandro Mota, Carlyle Júnior and Fernando Sousa

DESIGN OF A CMOS TEMPERATURE SENSOR USING THE ACM MODEL
Jefferson Dantas and Fernando Sousa

DESIGN OF LOW-VOLTAGE OPERATIONAL AMPLIFIERS WITH CMOS TECHNOLOGY
Marco Nakashima and Nobuo Oki

DESIGN PARAMETERS AND THEIR IMPACTS ON A CMOS APS SENSOR RESPONSE
Pedro Retes, Joao Melo, Henrique Casotti, Frederico Matos and Davies Monteiro

DEVICE CHARACTERIZATION OF AN IBM 0.18µM ANALOG TEST CHIP
Giovano da Rosa Camaratta, Eduardo Conrad Jr, Luiz Fernando Ferreira, Fernando Paixão Cortes and Sergio Bampi

DISTORTION ANALYSIS OF A CMOS BALANCED TRANSCONDUCTOR VALID FOR ALL REGIONS OF OPERATION
Antonio Silva and Fernado Sousa

EFFICIENCY OF STANDARD CELL LIBRARIES COMPOSITION
Pedro Egidio Menegaz Paganela, Eduardo Antonio Achutti Canabarro, André Reis and Renato Ribas

EYE MOVEMENT CONTROLLED MOUSE POINTER
Ernano Junior and Fernando Sousa

FAST ALGORITHM TO LEAKAGE POWER REDUCTION BY INPUT VECTOR CONTROL
Dionatan Moura, Paulo Butzen, Leomar da Rosa Jr., Andre Reis and Renato Ribas

FULL ADDER DESIGN USING QUANTUM DOT CELLULAR AUTOMATA LOGICAL GATES
Manoel Florêncio de Queiroz Neto and Fernando Rangel de Sousa

GRAPH-BASED SOLUTION FOR DUAL TRANSISTOR NETWORKS GENERATION
Vinicius Callegaro, Leomar S. da Rosa Jr, André I. Reis and Renato P. Ribas

HIGH FREQUENCY CAPACITANCE VERSUS VOLTAGE CURVES ANALYSIS IN PI-GATE SOI MOSFET STRUCTURES
Vinicius Zanchin, Michele Rodrigues and João Antonio Martino

IMPLEMENTATION OF A BASIC MICROCONTROLLER FOR TEACHING EMBEDDED SYSTEMS DESIGN
Maicon Pereira and Cesar Zeferino

INCREMENTAL HARDWARE DEVELOPMENT FROM MODULAR MIXED C-VHDL SIMULATION
Márlon Allan Lorencetti, Wagston Tassoni Staehler and Altamiro Amadeu Susin

MODELING THE IMPACT OF NBTI ON THE RELIABILITY OF ARITHMETIC CIRCUITS
Vinícius Camargo, Maurício da Silva, Lucas Brusamarello, Gilson Wirth and Peter Gloesekoetter

MODULAR MULTIPLICATION ALGORITHM FOR PKC
Diego Viot, Rodolfo Aurélio, Helano Castro and Jardel Silveira

MOS DEVICES TECHNOLOGY: FABRICATION AND CHARACTERIZATION
Jeferson Silva and Victor Sonnenberg

PARTITIONING IN THE PARROT FLOW FOR PHYSICAL SYNTHESIS
Samuel Pagliarini, Marcelo Johann and Ricardo Reis

RADIATION EFFECTS ON FLIP-FLOP SOI CMOS
Márcio Martino, Marcelo Sandri, Paula Agopian, Milene Galeti, Wilhelmus Van Noije and João Martino

RAMAGT – A TOOL FOR AUTOMATIC GENERATION OF RADIX-2M ARRAY MULTIPLIERS
Diego Jaccottet, Leandro Pieper, Eduardo Costa and Sérgio Almeida

RING VOLTAGE CONTROLLED OSCILLATORS FOR AN RF TRANSCEIVER
Heider Marcôni Guedes Madureira and José Edil Guimarães de Medeiros

TRANSIENT FAULT-TOLERANT FAST ADDERS IMPLEMENTED IN FPGAS
Guilherme Corrêa, Helen Franck, Eduardo Mesquita, Luciano Agostini and José Luís Güntzel

SIMULATION AND PARAMETER EXTRACITION OF CMOS DEVICES
Ricardo Wada, Hugo Ricardo Jimenez Grados and José Alexandre Diniz

SINGLE-ELECTRON CONTENT-ADDRESS MEMORY CIRCUIT
Bianca Alencar and Janaina Guimarães

SIPREMO - A SIMULATOR OF ELECTRONIC PROPERTIES OF MOLECULES
Bruno Borba and Carlo Cunha

TEMPERATURE INFLUENCE ON SOI CMOS DEVICES
Marcelo Sandri, Márcio Martino, Wilhelmus Van Noije and João Martino

VHDL MODELLING OF THE MAC-1 ARCHITECTURE
Giuliano Vilela

ARTIGOS - MESTRANDOS

A GLOBAL CRITICAL PATH AWARE PLACEMENT TECHNIQUE
Felipe Pinto, Lucas Cavalheiro and Ricardo Reis

A NUMERICAL ENVIRONMENT FOR PHOTOCONDUCTOR MODELING
Thiago Barçante Teixeira, Tiago de Oliveira Rocha and Davies William de Lima Monteiro

A RECONFIGURABLE OFDM MODULATOR FOR A SOFTWARE DEFINED RADIO PLATFORM
Bruno Silva

DESIGN AND EVALUATION OF A NMOS 90 NM 3D DEVICE
Thiago Assis, Gilson Wirth, Fernanda Kastensmidt and Ricardo Reis

DESIGN AND TEST OF A DDR SDRAM INTERFACE FOR FPGA SYSTEMS
Alexsandro Cristovão Bonatto, André Borin Soares and Altamiro Amadeu Susin

DESIGNING TEST STRUCTURES AND ANALYZING THEIR IMPACT IN NOC INTERCONNECTION FUNCTIONAL TESTING
Marcos Hervé, Marcelo Lubaszeski, Erika Cota and Fernanda Kastensmidt

IMPROVED METHOD TO EXTRACT THE PARASITIC S/D RESISTANCE IN MULTIPLE-GATE FETS
Talitha Nicoletti, Salvador Gimenez and João Martino

MODELING SET PULSE BROADENING IN INTEGRATED CIRCUITS
Ivandro Ribeiro, Gilson Wirth and Fernanda Lima Kastensmidt

ORBDD LOGIC SYNTHESIS: IMPROVING TIMING THROUGH FAN OUT MANAGING
Cristina Meinhardt, Reginaldo Tavares and Ricardo Reis

STUDY OF HIGH TEMPERATURE INFLUENCE ON MOS CAPACITOR HIGH FREQUENCY C-V CURVES BEHAVIOR
Ana Paula Borges Ziliotto and Marcello Bellodi

STUDY OF TRANSCONDUCTANCE FOR DOPED TRIPLE-GATE TRANSISTORS
Rudolf Bühler and Renato Giacomini

USING BULK BUILT-IN CURRENT SENSORS AND RECOMPUTING TECHNIQUES TO MITIGATE TRANSIENT FAULTS IN MICROPROCESSORS
Franco Leite, Tiago Balen, Marcos Hervé, Marcelo Lubaszewski and Gilson Wirth

ARTIGOS - DOUTORANDOS

AQUARIUS II – A PLATFORM FOR DYNAMIC RECONFIGURABLE SYSTEMS PROTOTYPING
Victor Medeiros and Manoel Lima

3D-NUMERICAL SIMULATION OF THE SOI-FINFET
Luiz Fernando Ferreira and Sergio Bampi

SOCIEDADE BRASILEIRA DE MICROELETRÔNICA

Av. Prof. Luciano Gualberto, 158 - Trav. 3
Butantã São Paulo, SP
CEP: 05508-900
Brasil
Tel: +55 (11) 3091-5658 / 5270
Fax: +55 (11) 3091-5664
©2017 SBMICRO | Todos os Direitos Reservados