Gate-Oxide Voltage Overstress Treatment in Charge Pump Circuits for Standard CMOS Technologies
C. A. de Moraes Cruz, C. A. dos Reis Filho, D. W. de Lima Monteiro, T. B. Bezerra, and L. L. F. da Silva

A 2-Transistor Sub-1V Low Power Temperature Compensated CMOS Voltage Reference: Design and Application
A. Olmos, F. Ferreira, F. P. Cortes, F. Chavez and M. S. Lubaszewski

Genetic Algorithm Applied to the Optimized Design of Semiconductor Microcavity Lasers
F. C. da Silva Coelho, E. A. Cotta and O. P. Vilela Neto

MogaMap2: Multi-Objective Mapping Algorithm with parameter control for Optimize Area, Performance and Power Consumption in FPGA
V. L. Souza and A. G. Silva-Filho

MOSFET ZTC Condition Analysis for a Self-biased Current Reference Design
P. Toledo, H. Klimach, D. Cordova, S. Bampi, and E. Fabris

Exploring Optimized Hadamard Methods to Design Energy-Efficient SATD Architectures
L. H. Cancellier, I. Seidel, A. B. Brascher, J. L. Guntzel, and L. Agostini

Improving Analytical Delay Modelingfor CMOS Inverters
F. S. Marranghello, A. I. Reis, and R. P. Ribas

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