IN SAMPA SBCCI
2003 - 16th Symposium on Integrated Circuits and Systems Design
SBMicro 2003 - 18th Symposium on Microelectronics Technology
and Devices Blue
Tree Tower Morumbi Convention Center - São Paulo - Brazil
Av. Roque Petroni Jr., 1000 - Morumbi São
September 8-11 , 2003
Monday, September 8, 2003
Samsung Semiconductor INC.
Ametista III Chair:Toshihiko Komatsu; Itaucom Abstract:
The object is to present an informative view of future semiconductor memory
trends (2003-2007) with a discussion of the applications driving those
trends. Discussion will include perspectives on DRAM, SRAM, Flash, and
options for next generation semiconductor memory. Applications discussed
will include enterprise computing, set-top box, automotive, consumer,
networking, and mobile/handset products.
for the Development of System-On-a-Chip ASIC systems with fast prototyping
methodology, very short time to market and low cost
Room:Topázio Chair:Volney Antonio Pedroni - CEFET-PR Abstract: With new VLSI technologies as 0.13-micron and emerging
90 nm, the densities of available FPGA devices have been growing to a
point where very complex SoC system are possible to be implemented in
new FPGA devices. The main issue is, usually, the price of this solution
for the final product when high production volumes are expected. To produce
an ASIC or Gate Array with those technologies, by other side, the initial
investment needed is, today, around US$ 500K for 0.13 micron and over
US$ 1M for 90 nm, a value too high for most applications. What we present
is a technology that takes the advantage of the FPGA development time
and methodology, but with an ASIC as a final product, without the initial
ASIC investments, allowing a fast development cycle, a very short time
to market and low cost.
DESAFIO TECNOLÓGICO GENIUS
Genius Instituto de Tecnologia
Room:Ametista III Chair:Mauricio Massazumi Oka - LSI/USP Abstract: Nesta palestra apresentamos o Prêmio Desafio Tecnológico
Genius, a ser lançado em 2004 pelo Genius Instituto de Tecnologia.
O Genius é o primeiro instituto privado de pesquisa e desenvolvimento
brasileiro criado por uma empresa nacional do ramo de eletrônica
de consumo. Em uma frase, o Genius pode ser definido como um agente de
inovação tecnológica, isto é, que atua na
transformação do conhecimento gerado nas universidades em
tecnologias e plataformas inovadoras para o mercado. A iniciativa do Prêmio
Desafio Tecnológico Genius visa estreitar o relacionamento de sucesso
já estabelecido entre o instituto e os grupos de pesquisa brasileiros,
através da premiação de grupos por sua atuação
destacada em temas de pesquisa sugeridas pelo instituto à comunidade
científica do país.
SPS Design Activities in Brazil: a success story
Junior32-Bit Microcontroller Design Manager
Motorola SPS, Brazil
Room:Topázio Chair:Volney Antonio Pedroni - CEFET-PR Abstract: This presentation describes the IC design activities
done by the Motorola Semiconductor Products Sector (SPS) in Brazil. The
history, products and technologies developed here will be described. There
will also be a discussion about the various factors that motivated the
creation of a design center in Brazil, and most important, what it takes
to make a design operation successful against world wide competition.
Tuesday, September 9, 2003
on Wafer Fab Manufacturing
M.S. Innovative Manufacturing Development
Room:Ametista III Chair:Otto Matarrita - Intel LAR CQE Abstract: The objective of the presentation on 300mm manufacturing
is to showcase Intel's industry leadership position in silicon technology
and manufacturing. Specifically, the opportunities and challenges with
new process technology, 300mm factory start up and ramp will be discussed.
The presentation also highlights the unique manufacturing challenges of
keeping pace with the technology treadmill while delivering world class
products and services in a cost effective, competitive and safe manner.
BrazilIP Network and the Fenix Platform
Guido Araujo (IC-UNICAMP)
Edna Barros (CIN-UFPE)
Room:Topázio Chair:José Camargo da Costa - UNB Abstract: New 90-nanometer VLSI technology will soon enable the
design of complex integrated circuits containing more than 100 Million
gates. In order to handle such complexity, the combination of pre-validated
semiconductor Intellectual Property (IP) modules into a System-on-a-Chip
(SoC)design has been showing to be a promissing design methodology. The
BrazilIP Network is a research network put together by eight of the largest
Brazilian universities (UFPE, UNICAMP, USP, UFRGS, UFCG, UNB, PUCRS, UFMG)
and supported by MCT/CNPq. The central goal of this network is to build
an IP exchanger and an open-source IP design methodology for the Brazilian
design community. In order to validate the proposed methodology, the BrazilIP
group is working in the design of a wireless platform called Fenix. In
this talk we will describe the ideas behind the BrazilIP and its Fenix
platform, as well as discuss mechanisms on how the community can participate
in such effort.
Adam BarrettAssembly and Technology Development (ATD)
Room:Ametista III Chair:Otto Matarrita - Intel LAR CQE Abstract: In the past few years, packaging and enabling technologies
have grown in complexity and diversity, continuing to challenge us all.
This presentation will focus on an overview of the driving factors influencing
change in packaging technology, and the future challenges ahead of us.
A brief overview of Intel packaging technology trends will also be shared
with the audience.
Low-Cost IC Fabrication with MOSIS
Hudson J. Mota de Alcantara
MOSIS - USC´s Information Science Institute
Room:Topázio Chair:José Camargo da Costa - UNB Abstract: MOSIS is a high-quality, low-cost prototyping and small
volume production service for state- of-the-art VLSI circuit with a worldwide
customer base. Since 1981, MOSIS has fabricated more than 50,000 different
IC designs for use by commercial firms, government agencies and universities.
In this overview, the current status of the MOSIS Service, its technology
offerings and the MOSIS Educational Program will be presented.