Technical Program
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CHIP IN THE PAMPA at a Glance
SBCCI2008, SBMicro2008 and SFORUM2008 |
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SBCCI'08 Detailed Program
Monday, September 1st
| 9:30 - 10:30 |
IEEE EDS/SBCCI Joint Tutorial (Room: Esmeralda)
Sizing CMOS Circuits by Means of the gm/ID Methodology and a Compact Model
Paul Jespers (Universit� Catholique de Louvain, Belgium)
Session Chair: S�rgio Bampi (UFRGS, Brazil)
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| 10:30 - 11:00 |
Coffee-Break (Room: Safira)
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| 11:00 - 12:30 |
IEEE CASS Tutorial 2 (Room: Rubi)
Synergistic Modeling and Optimization for Nanometer IC Design/Manufacturing Integration
David Z. Pan (University of Texas at Austin, USA)
Session Chair: Marcelo Johann (UFRGS, Brazil)
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| 12:30 -14:30 |
Break for Lunch
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| 14:30 -16:00 |
SBCCI Tutorial 3 (Room: Rubi)
Test Methods for Sigma-Delta Data Converters and Related Devices
Gordon W. Roberts (McGill University, Canada)
Session Chair: Altamiro Susin (UFRGS, Brazil)
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| 16:00 - 16:30 |
Coffee-break
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| 16:30 -18:00 |
SBCCI Tutorial 4 (Room: Rubi)
Reliability, Availability and Serviceability of Networks-on-Chip
�rika Cota and Marcelo Lubaszewski (UFRGS, Brazil)
Session Chair: Fernando Moraes (PUCRS, Brazil)
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| 18:30 - 20:30 |
Fringe Meeting (Room: Rubi, in Portuguese)
Assembl�ia Geral da Comiss�o Especial de Concep��o de Circuitos Integrados da Sociedade Brasileira de Computa��o
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Tuesday, September 2nd
Room: Rubi
| 8:20 - 9:00 |
Technical Program Opening (Room: Rubi)
Message from the General Chair
Marcelo Lubaszewski (UFRGS, Brazil)
Message from the Program Chairs
SBCCI2008
Michel Renovell (LIRMM, France), Rajesh Gupta (UCSD, USA)
SBMicro2008
Jacobus Swart (UNICAMP, Brazil), Siegfried Selberherr (TU-Wien, Austria)
SForum2008
Fernando Rangel (UFRN, Brazil), Salvador Gimenez (FEI, Brazil)
IEEE CASS Awards
Maciej Ogorzalek (IEEE CASS President)
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| 9:00 - 10:00 |
Keynote Speech (Room: Rubi)
System-level Design Technologies for Heterogeneous Distributed Systems
Giovani De Micheli (�cole Polytechnique F�d�rale de Lausanne, Switzerland)
Session Chair: Michel Renovell (LIRMM, France)
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| 10:00 - 10:30 |
Coffee-Break
Lauching of the Latin-American Student IC Design Contest
Organized by CEITEC
Supported by SBMicro, X-FAB and MOSIS
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| 10:30 - 11:30 |
Invited Talk 1 (Room: Rubi)
Lithography Friendly Routing: From Construct-by-Correction to Correct-by-Construction
David Z. Pan (University of Texas at Austin, USA)
Session Chair: Rajesh Gupta (UCSD, USA)
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| 11:30 - 14:00 |
Break for Lunch
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Session 1 - Design for Yield (Room: Rubi)
Chair: Antonio Petraglia (UFRJ, Brazil)
Co-chair: Jos� Luis G�ntzel (UFSC, Brazil)
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| 14:00 -14:25 |
Full-Chip Routing System for Reducing CU CMP & ECP Variation
Yanming Jia, Yici Cai and Xianlong Hong
Tsinghua University, China
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| 14:25 - 14:50 |
Metal Filling Impact on Standard Cells: Definition of the Metal Fill Corner Concept
Laurent Remy, Jean-Michel Portal, Philippe Coll, Fabrice Picot and Philippe Mico
ATMEL Rousset, IM2NP, France
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| 14:50 - 15:15 |
A Comparative Analysis of Fault Injection Methods via Enhanced On-chip Debug Infrastructures
Andre Fidalgo, Gustavo Alves, Manuel Gericota and Jose Ferreira
ISEP, FEUP, Portugal
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| 15:15 - 15:40 |
A New March Sequence to Fit DDR SDRAM Test in Burst Mode
Andr� Soares, Alexsandro Bonatto and Altamiro Susin
UFRGS, Brazil
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| 15:40 - 16:05 |
An Efficient Test and Characterization Approach for Nanowire-based Architectures
Eduardo Rhod and Luigi Carro
UFRGS, Brazil
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| 16:05 - 16:30 |
Coffee-break (Room: Safira)
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| 16:30 - 18:30 |
Political Panel (Room: Rubi, in Portuguese)
Pol�tica de C&T para Inova��o e Competitividade em TIC
Organizador: Altamiro Susin (SBMicro, Brazil)
Moderador: S�rgio Bampi (CECCI-SBC, Brazil)
Painelistas:
S�rgio Rezende, Exmo. Ministro de Ci�ncia eTecnologia
Jacobus Swart, Institutos do MCT
Ag�ncias Governamentais: CNPq, FINEP e BNDES
Assoc. Bras. das Ind�strias de Eletro-Eletr�nica
Gisele Roesems, Com. de Nanoeletr�nica - CEE
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| 18:30 - 19:30 |
Official Opening (in Portuguese)
Sergio Rezende, Exmo. Ministro de Ci�ncia eTecnologia
Secretaria de C&T do Estado do RGS
Univ. Fed. do Rio Grande do Sul
Ag�ncias Governamentais: CNPq, FINEP e CAPES
Marcelo Lubaszewski, Coordena��o do Evento
Altamiro Susin, SBMicro
S�rgio Bampi, CECCI-SBC
Maciej Ogorzalek, IEEE CASS
Entrega do Pr�mio Padre Landell de Moura
Sergio Rezende, Exmo. Ministro de Ci�ncia eTecnologia
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| 19:30 -21:30 |
Welcome Cocktail (Room: Esmeralda)
SBCCI 25� Anniversary Celebration
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Wednesday, September 3rd
| 9:00 - 10:00 |
Invited Talk 2 (Room: Rubi)
Time-Domain Signal Processing Techniques
Gordon W. Roberts (McGill University, Canada)
Session Chair: Edelweis Ritt (CEITEC, Brazil)
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| 10:00 - 10:30 |
Coffee-Break (Room: Safira)
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Session 2 - Architectural Design and Synthesis in Embedded Systems (Room: Rubi)
Chair: David Atienza (EPFL, Belgium)
Co-Chair: Volnei Pedroni (CEFET-PR, Brazil)
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| 10:30 - 10:55 |
Implementation of a Double-Precision Multiplier Accumulator with Exception Treatment to a Dense Matrix Multiplier Module in FPGA
Abner Barros, Viviane Souza, Victor Medeiros and Manoel Lima
(UFPE, Brazil)
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| 10:55 - 11:20 |
The Performance of Pollution Control Victim Cache for Embedded Systems
Giancarlo Heck and Roberto Hexsel
(UFPR, Brazil)
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| 11:20 - 11:45 |
Low-area ASIC Implementation for Configurable Coefficients FIR Pulse Shape Filters of Digital TV Systems
Wagner Silverio, Janaina Costa, Joao Fragoso and Julio Silva
(CEITEC,Brazil)
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| 11:45 - 12:10 |
An Approximate Algorithm for the Multiple Constant Multiplications Problem
Levent Aksoy and Ece Olcay Gunes
Istanbul Technical University, Turkey
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| 12:10 - 12:35 |
Area Optimization Algorithms in High-speed Digital FIR Filter Synthesis
Levent Aksoy and Ece Olcay Gunes
Istanbul Technical University, Turkey
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Session 3 - High Performance Circuits (Room: Top�zio)
Chair: Fernando Silveira (Universidad de la Rep�blica, Uruguay)
Co-Chair: Di�genes C. Silva Jr (UFMG, Brazil)
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| 10:30 - 10:55 |
A 2.4GHZ LNA in a 90-NM CMOS Technology Designed with ACM Model
Rafaella Fiorelli, Eduardo Peralias and Adoraci�n Rueda
Universidad de la Rep�blica, Uruguay IMSE-CNM, Spain
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| 10:55 - 11:20 |
A 40MHZ 70dB Variable Gain Amplifier Design Using the gm/ID Design Method
Fernando Paix�o Cortes and Sergio Bampi
UFRGS, Brazil
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| 11:20 - 11:45 |
A 2.7�A Sub1-V Voltage Reference
Juan Carlos Mateus Ardila, Elkim Felipe Roa Fuentes, Hugo Daniel Hernandez Herrera and Wilhelmus Adrianus Maria Van Noije
Industrial University of Santander, Colombia Polytechnic School-USP, Brazil
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| 11:45 - 12:10 |
A Wide Band CMOS Differential Voltage-Controlled Ring Oscillator
Luciano da Paula, Sergio Bampi, Eric Fabris and Altamiro Susin
UFRGS, Brazil
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| 12:10 - 12:35 |
RBF Circuits Based on Folded Cascode Differential Pairs
Marcio Lucks and Nobuo Oki
IAE, Unesp, Brazil
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| 12:35 -14:00 |
Break for Lunch
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Session 4 - Design for Reliability (Room: Rubi)
Chair: Gilson Wirth (UFRGS, Brazil)
Co-Chair: Victor Champac (INAOE, Mexico)
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| 14:00 -14:25 |
A Current Limiter for DC/DC Converters with Compensation for Process and Temperature Variations
Jader A. De Lima and Wallace A. Pimenta
Freescale Semiconductor, Brazil
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| 14:25 - 14:50 |
Current Mode Read-out Circuit for Infrared Photodiode Applications in 0.35 �M CMOS
Pietro Maris Ferreira, Jos� Gabriel R. C. R. C. Gomes and Antonio Petraglia
UFRJ, Brazil
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| 14:50 - 15:15 |
Early Voltage and Saturation Voltage Improvement in Deep Sub-micron Technologies Using Associations of Transistors
Eduardo Conrad Junior, Alessandro Girardi, Fernando Paix�o Cortes and Sergio Bampi
UFRGS, UNIPAMPA, Brazil
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| 15:15 - 15:40 |
Encountering Gate Oxide Breakdown with Shadow Transistors to Increase Reliability
Claas Cornelius, Frank Sill, Hagen S�mrow, Jakob Salzmann, Dirk Timmermann and Di�genes da Silva
University of Rostock, Germany
UFMG, Brazil
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| 16:05 - 16:30 |
Coffee-break (Room: Safira)
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| 16:30 - 18:30 |
Technical Panel (Room: Rubi)
Challenges of the Nanoscale Era
Organizer: Ricardo Jacobi (UnB, Brazil)
Moderator: Sergio Bampi (UFRGS, Brazil)
Panelists:
Rajesh Gupta (UCSD, USA)
Siegfried Selberherr (TU-Wien, Austria)
Andreas Kuehlmann (Cadence Berkeley Labs, USA)
Michel Renovell (LIRMM, France)
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| 18:30 - 20:30 |
Fringe Meeting (Room: Esmeralda, in Portuguese)
Assembl�ia Geral da Sociedade Brasileira de Microeletr�nica
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Thrusday, September 4th
| 9:00 - 10:00 |
Invited Talk 3 (Room: Rubi)
System Design for 3D Silicon Integration
Ahmed Jerraya (CEA LETI Grenoble, France)
Chair: Edna Barros (UFPE, Brazil)
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| 10:30 - 11:00 |
Coffee-Break (Room: Safira)
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Session 5 - Advances in Low Power Design and Power Management (Room: Rubi)
Chair: Reinaldo Bergamaschi (CadComponents, USA)
Co-Chair: Elmar Melcher (UFPb, Brazil)
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| 10:30 - 10:55 |
A Novel Scheme to Reduce Short-circuit Power in Mesh-based Clock Architectures
Gustavo Wilke, Renan Fonseca, Cecilia Mezzomo and Ricardo Reis
UFRGS, Brazil
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| 10:55 - 11:20 |
Power and Performance Tradeoffs with Process Variation Resilient Adaptive Cache Architectures
Mahmoud Bennaser and Csaba Andras Moritz
Kuwait University, Kuwait
University of Massachusetts, USA
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| 11:20 - 11:45 |
Power Management Techniques for Very Low Power Consumption and EMI Reduction in Automotive Applications
Eduardo Ribeiro da Silva, Ivan Carlos Ribeiro do Nascimento, Frank Herman Behrens, Marcos Mauricio Pelicia, Remerson Stein Kickhofel and Ricardo Maltione
Freescale, Brazil
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| 11:45 - 12:10 |
A Coloured Petri Net Based Approach for Estimating Execution Time and Energy Consumption in Embedded System
Gustavo Callou, Ermesson Carneiro, Bruno Nogueira, Paulo Maciel and Eduardo Tavares
UFPE, Brazil
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| 12:10 - 12:35 |
A Novel AES Cryptographic Core Highly Resistant to Differential Power Analysis Attacks
Felipe Ghellar and Marcelo Lubaszewski
UFRGS, Brazil
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Session 6 - Circuit Optmization Methods and Tools (Room: Top�zio)
Chair: Eric Fabris (UFRGS, Brazil)
Co-Chair: Wilhelmus Van Noije (USP, Brazil)
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| 10:30 - 10:55 |
An Improved and Automated Design Tool for the Optimization of CMOS OTAs Using Geometric Programming
Jorge Armando Oliveros Hincapi�, Dwight Jos� Cabrera Salas, Elkim Felipe Roa Fuentes and Wilhelmus Adrianus Maria Van Noije
Polytechnic School-USP, Brazil
Industrial University of Santander, Colombia
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| 10:55 - 11:20 |
CMOS Op-Amp Power Optimization in All Regions of Inversion Using Geometric Programming
Pablo Aguirre and Fernando Silveira
Universidad de la Rep�blica, Uruguay
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| 11:20 - 11:45 |
Systematic Methodology for the Design of Seevinck's CMOS Log-domain Integrators
Victor Ariel Leal Sobral, Roberto Esperidi�o da Costa Bomfim, Robson Nunes de Lima and Ana Isabela Ara�jo Cunha
UFBA, Brazil
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| 11:45 - 12:10 |
BenCGen: a Digital Circuit Generation Tool for Benchmarks
Fabricio Andrade, Leandro Silva and Antonio Fernandes
UFMG, Brazil
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| 12:35 -14:30 |
Break for Lunch
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Session 7 - Networks-on-Chip Design and Optimization (Room: Rubi)
Chair: Ivan Saraiva Silva (UFRN, Brazil)
Co-Chair: Cesar Zeferino (Univali, Brazil)
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| 14:30 - 14:55 |
A Simplified Executable Model to Evaluate Latency and Throughput of Networks-on-chip
Luciano C. Ost, Leandro M�ller, Leandro Soares Indrusiak, Fernando G. Moraes, Sanna M��tt�, Jari Nurmi and Manfred Glesner
PUCRS, Brazil
TU Darmstadt, Germany
Tampere University of Technology, Finland
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| 14:55 -15:20 |
Executable Formal Specification and Validation of NOC Communication Infrastructures
Dominique Borrione, Amr Helmy, Laurence Pierre and Julien Schmaltz
TIMA Laboratory, France
Radboud University, Nijmegen, The Netherlands
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| 15:20 - 15:45 |
MOTIM - An Industrial Application Using NOCs
Fernando Moraes, Everton Carara, Daniel Pigatto and Ney Calazans
PUCRS, DATACOM TELEMATICA, Brazil
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| 16:00 - 16:30 |
Coffee-break (Room: Safira)
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Session 8 - FPGA and Fault Tolerant Designs (Room: Rubi)
Chair: Claudionor Coelho (UFMG/Jaspers, Brazil)
Co-Chair: Fernanda Kastensmidt (UFRGS, Brazil)
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| 16:30 -16:55 |
Fault-Tolerance in FPGA's Through CRC Voting
Helano Castro, Jardel Silveira and Alexandre Coelho
LESC, Brazil
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| 16:55 - 17:20 |
Prototyping a Triple Track Logic Robustness Against DPA
Rafael Iankowski, Ney Calazans, Victor Lomne, Lionel Torres, Philippe Maurine and Michel Robert
PUCRS, Brazil
LIRMM, France
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| 17:20 - 17:45 |
Synchronizing Triple Modular Redundant Designs in Dynamic Partial Reconfiguration Applications
Conrado Pilotto, Jose Rodrigo Azambuja and Fernanda Lima Kastensmidt
UFRGS, Brazil
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| 17:45 - 18:10 |
Self-Adaptable Slew-Rate Control Output Buffer for Embedded Microcontroller Port Applications
Andre L. Vilas Boas, Ricardo Maltione, Eduardo Ribeiro da Silva and Alfredo Olmos
Freescale Semicondutores Brasil Ltda, Brazil
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| 18:10 - 18:35 |
Efficient Dynamic Reconfiguration for Multi-Context Embedded FPGA
Julien Lallet, Sebastien Pillement and Olivier Sentieys
IRISA, France
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Session 9 - Advances in Image Compression Architectures ((Room: Top�zio)
Chair: Ricardo Jacobi (UnB, Brazil)
Co-Chair: Norian Marranghello (UNESP, Brazil)
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| 16:30 -16:55 |
Architectural Design for the New QSDS with Dynamic Iteration Control Motion Estimation Algorithm Targeting HDTV
Marcelo Porto, Luciano Agostini, Altamiro Susin and Sergio Bampi
UFRGS, Brazil
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| 16:55 - 17:20 |
A New Pipelined Architecture of H.264/MPEG-4 AVC Deblocking Filter
Ronaldo Husemann, Altamiro Susin and Valter Roesler
UFRGS, Brazil
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| 17:20 - 17:45 |
High Throughput Architecture for H.264/AVC Motion Compensation Sample Interpolator for HDTV
Bruno Zatt, Luciano Agostini, Altamiro Susin and Sergio Bampi
UFRGS, UFPel, Brazil
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| 17:45 - 18:10 |
Analog Hardware Implementation of a Vector Quantizer for Focal-Plane Image Compression
Hugo Haas, Jos� Gabriel Gomes and Antonio Petraglia
UFRJ, Brazil
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| 18:10 - 18:35 |
A Novel Hardware Architecture Design for Binary Arithmetic Decoder Engines Based on Bitstream Flow Analysis
Dieison Antonello Depr�, Vagner Santos da Rosa and Sergio Bampi
UFRGS, Brazil
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| 18:35 - 20:30 |
Fringe Meeting (Room: Rubi)
Encontro com o Comit� Assessor de Microeletr�nica do CNPq
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| 20:30 - 23:00 |
Banquet Dinner: Churrascaria Garfo & Bombacha
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