|
Measuring
the Efficiency of Cache Memory on Java Processors for Embedded
Systems
A. C. S. Beck; M. B. Rutzig; L. Carro
A
Cryptography Core Tolerant to DFA Fault Attacks
C. R. Moratelli, É. Cota and M. S. Lubaszewski
Power
Constrained Design Optimization of Analog Circuits Based on
Physical gm/ID characteristics
A. Girardi; S. Bampi
Communication
Aware Optimization of the Task Binding in Hardware/Software
Reconfigurable Networks
T. Streichert; C. Strengert; D. Koch; C. Haubelt; J. Teich
Hardware
Support in a Middleware for Distributed and Real-Time Embedded
Applications
E. T. Silva Jr; F. R. Wagner; E. P. Freitas; L. Kunz;
C. E. Pereira
Mapping
of Massive Data Processing Systems to FPGA Computers Based
on Temporal Partitioning and Design Space Exploration
P. S. B. do Nascimento; S. M. da Silva; J. L. Seixas;
R. E. Sant’Anna; M. E. de Lima
Cover, back-cover,
foreword and sumario |