Technical Program

General Program (SBCCI, SBMicro, WCAS, SForum, PATMOS and VARI)


WCAS Program

Tuesday, September 1st
Opening - Room: Fernando Pessoa 1 & 2 - 18:00 - 18:20
SBmicro Awards - Room: Fernando Pessoa 1 & 2 - 18:20 - 18:40
Welcome Reception and Cocktail - Room: Foyer S2 & Praça Luiz de Camões - 18:40 - 20:00
Wednesday, September 2nd
Keynotes - Room: Fernando Pessoa 1 & 2
Keynote 1
08:40-09:40
Lessons from Brain Connectivity for Future Interconnect in ICs
Jan Rabaey
University of California at Berkeley - UCB, USA
09:40-10:00 Coffe-Break & Exhibitors
12:00-13:20 Lunch
Sponsor Presentations 1 - Room: Zélia Gatai 1
Chair:
13:35-13:50 FPGAs em aplicações de IoT
Fabio Petrassem de Sousa, Macnica DHW
13:50-14:05 Access to ASIC Prototyping and Production Services
Carl Das, IMEC
14:05-14:20 MCTI and imec partnership: learning for  excellence in nano-electronics
Liesbet Van der Perre, MCTI/IMEC
14:20-14:35 Mentor Graphics
Alexandre Lerer, Mentor Graphics
14:35-14:50
O projeto Unitec e a importância da contratação de recursos humanos
Edelweis Ritt, Unitec
14:50-15:05
Empowering Innovation - Tools and Solutions for IP Migration, Analysis, Modeling & Sizing of Nanometer IC Designs
Gunter Strube, MunEDA
15:05-15:20 Nano Imprint Lithography: Basics, Benefits and Applications
Otto Bobenstetter, EVG Group
15:20-15:40 Coffe-Break & Exhibitors
Sponsor Presentations 2 - Room: Zélia Gatai 1
Chair:
15:40-15:55 CEITEC – PMUB (Projeto Multiusuário Brasileiro)
 Fernando Chávez, CEITEC
15:55-16:10 3D Electromagnetic Simulation using CST STUDIO SUITE 2015
Rodrigo Enjiu, 3Dtronic/CST
16:25-16:40 Electronic Systems and IoT trends
Victor Grimblatt, Synopsys
16:40-16:55 Técnicas de medição e Análise para dispositivos Semicondutores
Keysight
16:55-17:10 O poder dos FPGAs programáveis pelo usuário em suas aplicações de teste
Renan Azevedo, National Instruments
17:10-17:25 Advanced Packaging Technologies
David Rasmussen, Palomar
17:25-17:40 MOSIS
MOSIS
17:40-17:55 Heidelberg
Heidelberg
17:55-18:10 Osciloscópios Rhode & Schwarz: ferramentas essenciais para análise avançada de protocolos
Rhode & Schwarz
18:10-18:25  Innovative solutions for advanced nanofabrication
Andre Linden, Raith
Thursday, September 3rd
Keynotes - Room: Fernando Pessoa 1 & 2
Keynote 2
08:40-09:40
Majority-based synthesis for digital nano-technologies
Giovanni De Micheli
EPFL, Switzerland
09:40-10:00 Coffe-Break & Exhibitors
Invited Paper - Room: Zélia Gatai 1
Chair:
Invited Paper
10:00-10:40
SoC Self-test with Logic BIST
Alexandre S. Lujan, Rubens Takiguti, Marcelo Fukui
BSTC, Freescale Semiconductors, Campinas, Brazil
Session 1 - Digital Design - Room: Zélia Gatai 1
Chair: Alexandre Lujan
10:40-11:00 ASIC IMPLEMENTATION OF A POWER QUALITY DATA COMPRESSION/DECOMPRESSION CORE
Marcos Hervé, Cristiano Thiele, César Crovato, Guilherme Soares and Sergio Bampi
11:00-11:20 A COMPREHENSIVE GUIDE FOR CRC HARDWARE IMPLEMENTATION
Dawood Alnajjar and Mauricio Suguiy
11:20-11:40 MEMORY OPTIMIZATIONS ON A WINDOWING/BLOCK SWITCHING MODULE
Joaquim Oliveira, Wagner Oliveira and Fábio Jesus
11:40-12:00 IZHIKEVICH-NEURON MODEL ON FPGA: A HIGHLY COMBINATIONAL IMPLEMENTATION
Vitor Bandeira, Vivianne Costa, Guilherme Bontorin and Ricardo Reis
12:00-13:20 Lunch
Session 2 - Analog - Room: Zélia Gatai 1
Chair:
13:20-14:00
A NEW READOUT STRATEGY FOR MICROBOLOMETER INFRARED FOCAL PLANE ARRAYS
Leonardo Sa, Germano Fonseca and Antonio Mesquita
13:20-14:00
BROADBAND HIGH DYNAMIC SURVEILLANCE
Renan DOS SANTOS FAGUNDES, Denis LE JEUNE and Ali MANSOUR
14:00-14:20 A 10-BIT SD A/D CONVERTER FOR THE SBCD IN 180NM CMOS TECHNOLOGY
Helga U. Dornelas, Roger L. B. Zamparette, Juan C. Monsalve D. and Eric Fabris
14:20-14:40 DESIGN METHODOLOGY OF SIGMA-DELTA MODULATORS BASED ON Q FACTOR FOR STABILITY CONTROL
José Andrade, Marlon Filho, Heider Madureira and Rafael Ferreira
14:40-15:00 PUSH PULL BASED TRANSCONDUCTOR FOR ULTRA LOW VOLTAGE APPLICATIONS
Luís Henrique Rodovalho, 
Eric Fabris, Hamilton Klimach
15:00-15:20 MIXED RF-DIGITAL DESIGN-TO-TEST FRAMEWORK FOR POWER AMPLIFIER DIGITAL PREDISTORTION
Takao Inoue and Alexsanser Loula
15:20-15:40 Coffe-Break & Exhibitors
Session 3 - Digital Design for Wireless Applications - Room: Zélia Gatai 1
Chair:
15:40-16:00 FPGA IMPLEMENTATION AND ASIC RESOURCE ESTIMATION OF AN FFT/IFFT FOR AN MR-OFDM TRANSCEIVER COMPLAINT WITH IEEE802.15.4G
Daniel Garcia Urdaneta, Eduardo Rodrigues de Lima, Gabriel Santos da Silva, Cesar Giovanni Chaves Arroyave, Jacqueline Gomes Mertes and Luís Geraldo Pedroso Meloni
16:00-16:20 HARDWARE IMPLEMENTATION OF AN OFDMA-WRAN AUTO-CORRELATION
João Carlos Nunes Bittencourt, Nelson Alves Ferreira Neto and Wagner Luiz Alves de Oliveira
16:20-16:40 SYSTEM-LEVEL ANALYSIS FOR A NEW SBCD TRANSPONDER SOC
Marcelo Negreiros, David Cordova, Everton Reckziegel, Lucas Paris, Jerson Guex, Pedro Toledo and Eric Fabris
PANEL
17:20-19:00
Challenges for Semiconductor in Brazil and 10 years of the program IC Brazil
Room: Fernando Pessoa 1 & 2
Moderator: Jacobus W. Swart
19:20-21:00 Conference Dinner
Friday, September 4th
Keynotes - Room: Fernando Pessoa 1 & 2
Keynote 3
08:40-09:40
A Path towards Average-Case Silicon via Asynchronous Resilient Bundled-Data Design
Peter Beerel
University of Southern California (USC) in Los Angeles
09:40-10:00 Coffe-Break & Exhibitors
Session 4 - Digital EDA and Methodology - Room: Zélia Gatai 1
Chair: Victor Grimblatt
10:00-10:20 STANDARD CELL LIBRARY DATABASE GENERATION FOR DIGITAL ASIC DESIGN FLOW
Luís Henrique Reinicke, Lauro Puricelli, Cícero Nunes, Maurício Altieri, Marcelo Erigson, Augusto Neutzling, Alonso Schmidt, Paulo Francisco Butzen, Renato Perez Ribas and Eric Fabris
10:20-10:40 PYHDL HIGH-LEVEL SYNTHESIS THROUGH A CROSS-COMPILER FROM PURE PYTHON TO HARDWARE DESCRIPTION LANGUAGES
Jaime-Alberto Parra-Plaza
10:40-11:00 FAST INSTRUCTION-DRIVEN TIMING PROCESSOR MODEL FOR MANY-CORE EMBEDDED SYSTEMS
Felipe Rocha Rosa, Luciano Ost and Ricardo Reis
11:00-11:20 AN OVERVIEW OF STATIC AND SIMULATION-BASED TECHNIQUES FOR SYSTEMS-ON-CHIP VERIFICATION
João Carvalho and Wagner Oliveira
11:20-11:40 FORMAL VERIFICATION IN COMMERCIAL SEMICONDUCTOR IP DEVELOPMENT: A RECOLLECTION
Walter Encinas
11:40-12:00 EFFECT OF HIERARCHICAL ATPG ON SCAN PATTERN VOLUME
Alexandre Lujan, Cezar Santos, Jorge Corso and Rubens Takiguti
12:00-13:20 Lunch
Session 5 - EDA and Methodology - State Machines and Process Related - Room: Zélia Gatai 1
Chair:
14:00-14:20
A NOVEL ARCHITECTURE FOR LOCALLY-CLOCKED EXTENDED BURST-MODE FINITE STATE MACHINES
Duarte Oliveira, Tiago Curtinhas and Lester Faria
14:20-14:40 A NOVEL SYNTHESIS METHOD BASED ON DIRECT MAPPING OF LOW-POWER SYNCHRONOUS FINITE STATE MACHINES
Duarte Oliveira, Tiago Curtinhas, Lester Faria and Leonardo Romano
14:40-15:00 A STATE ASSIGNMENT METHOD FOR LOW-POWER SYNCHRONOUS FINITE STATE MACHINES BASED ON GENETIC ALGORITHM
Gabriel Dalario, Tiago Curtinhas, Jocemar Souza, Duarte Oliveira and Lester Faria
15:00-15:20 SIGNAL ELECTROMIGRATION IN NANO-SCALE TECHNOLOGIES
Gracieli Posser, Vivek Mishra, Palkesh Jain, Ricardo Reis and Sachin S. Sapatnekar
15:20-15:40 ELECTRICAL CHARACTERIZATION OF INTEGRATED CIRCUIT INTERCONNECTS PROCESSED WITH FOCUSED ION BEAM
Emmanuel Petitprez, Saulo Jacobsen, Ronald Tararam, Cristiano Krug and Marcelo Lubaszewski
15:40-16:00 NEW TECHNOLOGY MIGRATION METHODOLOGY FOR ANALOG IC DESIGN
Helga Dornelas, Alonso Schmidt, Gunter Strube and Eric Fabris
Best Papers Awards - Room: Fernando Pessoa 1 & 2 - 16:00 - 16:20
Closing Ceremony - Room: Fernando Pessoa 1 & 2 - 16:20 - 16:40

 

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