Digital Circuits, Mixed Signal and Applications I

August 31st – 14:00pm – 16:00pm

Room: FPGA

Chair: Ney Calazans

• 14:00h: Energy-Aware Light-Weight DMM-1 Patterns Decoders with Efficiently Storage in 3D-HEVC
  • Gustavo Sanchez, César Marcon and Luciano Agostini

• 14:20h: A Novel Pruned-Based Algorithm for Energy-Efficient SATD Operation in the HEVC Coding

  • Leonardo Soares, Claudio Diniz, Eduardo Costa and Sergio Bampi

• 14:40h: Low-Power Hardware Design for the HEVC Binary Arithmetic Encoder Targeting 8K Videos
  • Fábio Luís Ramos, Jones Goebel, Bruno Zatt, Marcelo Porto and Sergio Bampi

• 15:00h: An FPGA-based accelerator for multiple real-time template matching
  • Erika Albuquerque, Antonyus Ferreira, Renato Carlos, Joao Silva, Joao Barbosa, Djeefther Souza and Edna Barros

• 15:20h: A Hardware Accelerator for the Alignment of Multiple DNA Sequences

  • Antonyus Ferreira, Joao Silva, Jefferson Anjos, Luiz Figueiroa, Edna Barros, Manoel Lima and Victor Medeiros

• 15:40h: Field-coupled Nanocomputing Energy Analysis Tool – (SFORUM)
  • Marco Antonio Ribeiro, Jeferson Chaves and Omar Vilela Neto