VOLUME 21 – NÚMERO 1 – ANO 2021

Microelectronics Students Forum 2021

August 23 to 27, 2021
Virtual

CORPO EDITORIAL

Jacobus Swart - UNICAMP
Coordenador Geral

Monica Pereira - UFRN
Coordenadora de Programa

Alessandro Girardi - UNIPAMPA
Coordenador de Programa

Bernardo Leite - UFPR
Coordenador de Publicação

ARTIGOS

A 0.4-V 170-µw Fully-Integrated LNA for 2.4-ghz RF Receivers
Giovana P. Ceolin and Lucas Compassi-Severo

Selective Algorithm for Group Method of Data Handling Applied to Power Amplifier Modeling
Ana Paula Princival Machado and Eduardo Gonçalves de Lima

Behavioural modelling with the reception of a modulated signal of a radio-frequency receiver based on N-path filters and mixers
Gabriel Vitor Klaumann Gubert and Luis Henrique Assumpcão Lolis

Circuit Analysis Based on Linearization Around Circuit Envelope
Dhessica M. S. de Moura and Eduardo G. de Lima

Characterization of a reconfigurable CMOS power amplifier with IEEE 802.11ax signals
Enzo Bonametti Coutinho, Bruno Tarui and Bernardo Leite

Mathematical Modeling Of The Output Power In Power Amplifiers
Luiz A. S. Tsurukawa and Eduardo G. de Lima

Design of Steel ASIC, a RISC-V processor
Vinícius dos Santos, Fabio Petkowicz, Rafael da Silva, Rafael Calçada, Ricardo Reis

Collenda: A Games Development Platform in reconfigurable environments using FPGA devices
Gabriel Sá Barreto Alves, Anfranserai Morais Dias and João Carlos Nunes Bittencourt

Behavioral Model Comparison of two GFSK Demodulator Topologies for BLE
Arthur Cruz Morbach, Jonas Dandanel de Castro and Sandro Binsfeld Ferreira

A Review On The Main Algorithms For Measuring Steps, Sleep And Falling In Wearable Applications
Rafael Ferreira, João Guilherme Cintas, Cláudio Mello, Ilan Correa, Leonardo Ramalho and Aldebaro Klautau

Posit-based Spiking Neuron in an FPGA
Victor H. L. Silva, Jeferson F. Chaves, Rogerio M. Gomes and Bruno A. Santos

IC Design Implementation of an Artificial Neuron Using Open-Source Tools
Marcelo Felix Carlos, Sara Dereste dos Santos and Ricardo Pires

Exploring the use of 3-input Gates in Field-Coupled Nanotechnologies
Ícaro G. S. Moreira, Maria D. Vieira, Omar P. Vilela Neto, Ricardo S. Ferreira and Jose A. M. Nacif

Digital Control Circuit for Offset Calibration in CMOS Comparators
Joao Lucas Johan Brum and Paulo César C. de Aguirre

Generating Approximate Boolean Functions
Alexandre R. Crestani, Gabriel Ammes, Paulo F. Butzen and Renato P. Ribas

Digital Control of a Synchronous 8-bit SAR ADC
Edivania F. Silva, Joao Lucas Johan Brum and Paulo César C. de Aguirre

Memory-Aware, Low-Power and High-Throughput AV1 FME Interpolation Architecture
William Kolodziejski, Robson Domanski, Marcelo Porto, Bruno Zatt and Luciano Agostini

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