25/01/2011
Empresa SMART procura profissionais na área de semicondutores e design
A empresa SMART de packaging sediada no Estado de SP anuncia que procura profissionais na área de semicondutores e design.
Segue abaixo a descrição (em inglês):
Advanced SSD Technology Group
Objective: The objective of this group is to develop coding, detection and flash translation layer technologies to enable at least a 6x improvement in endurance specification of NAND flash used in enterprise Solid State Disk Drives (SSDs). This group will work closely with its US sister group characterizing NAND flash properties, developing practical reliability models of NAND flash, and inventing proprietary detection and coding technologies to maximize the useful life Solid State Disk drives. The team will include expertise in semiconductor physics, communication system design, system modeling, and software development.
Deliverables: Algorithms, firmware, test techniques, NAND flash test equipment.
Staff:
Communication coding expert - Designs, simulates and the performance of coding and detection subsystem for next generation SSD. Works c losely with US based team to develop, simulate and analyze advanced detection systems for next generation SSDs.
o Experience designing, analyzing, and simulating Low Density Parity Check Codes (LDPC codes)
o Proficient in mathematical modeling using C, C++, Matlab
o Understands BCH and Reed Solomon Error Correction Coding
o Knowledge of NAND flash and semiconductor physics a plus
o PhD in Communication Theory or Signal Processing with 0-5 years work experience.
Semiconductor Device Physics Engineer - Develops NAND flash reliability experiments, analyzes results, and develops models for NAND wear. Performs analysis on SSD NAND failures and evaluate future nonvolatile memory technology.
o Semiconductor reliability engineer.
o Experience with NAND chip development or failure analysis.
o Masters or equivalent experience in Physics or Electrical Engineering
o BS + 2 years experience in semiconductor failure analysis or MS EE with focus in semiconductor physics.
System Modeling Engineer. Mathematically models host workloads, algorithms for handling data and system performance within an SSD. May work with customers to develop workload models.
o Mathematically skilled programmer.
o Strong system analysis skills
o Stochastic processes and modeling
o Parameter estimation
o Knowledge of NAND technology a plus.
o BS + 2 years, or MS EE.
Flash Characterization Software engineer. Writes PC based software for running flash characterization equipment, executing experiments and processing experimental results.
o Expert in C++, Visual Basic or other object oriented language.
o Strong analytic skills
o CS or EE with 2+ years experience in PC based code development.
The above job descriptions are written for relatively recent college graduates where it is assumed that finding more senior engineers with direct experience in the desired areas will be difficult. However, if it is possible to get more senior engineers with direct experience, it would be preferred over new grads.
NAND Flash Suppport Circuitry Development Group
Objective: This group will develop circuits to be packaged in multi-die NAND flash packages that add critical functionality and Intelluctual Property (IP) to the chips for use in Solid State Drives (SSD’s). Projects will include developing circuitry for improved signal integrity during reads and writes as well as for simplifying communications to the package.
Deliverables: Circuits that are integrated into multi-die packages to improve chip performance.
Staff:
Senior Silicon packaging engineer. Acts as the intermediary between NAND packaging manufacturing group, and the circuit design engineer.
o 8+ years experience in semiconductor packaging.
Senior analog circuit design engineer. Responsible for specifying, designing and integrating analog circuits packaged with NAND flash multi-die packages.
o 5+ years experience developing and integrating high speed analog circuits.
Senior Digital Design Engineer. Designs stand alone digital circuits
o 5+ years VHDL design
o Layout and routing experience
Test and Verification Engineer.
Technical Leader. Technical mentor for the Brazil teams. Acts as the primary contact for US development teams, providing status, schedule and communicating company information to the local teams.
o Knowledgeable in semiconductor packaging and NAND technology.
o 3+ years of technical management experience.
Contato:
Cleber Figueira
Telefone: 11 4417-7200 r7340
celular: 11 9666-2064
e-mail: cleber.figueira@smart.com
Segue abaixo a descrição (em inglês):
Advanced SSD Technology Group
Objective: The objective of this group is to develop coding, detection and flash translation layer technologies to enable at least a 6x improvement in endurance specification of NAND flash used in enterprise Solid State Disk Drives (SSDs). This group will work closely with its US sister group characterizing NAND flash properties, developing practical reliability models of NAND flash, and inventing proprietary detection and coding technologies to maximize the useful life Solid State Disk drives. The team will include expertise in semiconductor physics, communication system design, system modeling, and software development.
Deliverables: Algorithms, firmware, test techniques, NAND flash test equipment.
Staff:
Communication coding expert - Designs, simulates and the performance of coding and detection subsystem for next generation SSD. Works c losely with US based team to develop, simulate and analyze advanced detection systems for next generation SSDs.
o Experience designing, analyzing, and simulating Low Density Parity Check Codes (LDPC codes)
o Proficient in mathematical modeling using C, C++, Matlab
o Understands BCH and Reed Solomon Error Correction Coding
o Knowledge of NAND flash and semiconductor physics a plus
o PhD in Communication Theory or Signal Processing with 0-5 years work experience.
Semiconductor Device Physics Engineer - Develops NAND flash reliability experiments, analyzes results, and develops models for NAND wear. Performs analysis on SSD NAND failures and evaluate future nonvolatile memory technology.
o Semiconductor reliability engineer.
o Experience with NAND chip development or failure analysis.
o Masters or equivalent experience in Physics or Electrical Engineering
o BS + 2 years experience in semiconductor failure analysis or MS EE with focus in semiconductor physics.
System Modeling Engineer. Mathematically models host workloads, algorithms for handling data and system performance within an SSD. May work with customers to develop workload models.
o Mathematically skilled programmer.
o Strong system analysis skills
o Stochastic processes and modeling
o Parameter estimation
o Knowledge of NAND technology a plus.
o BS + 2 years, or MS EE.
Flash Characterization Software engineer. Writes PC based software for running flash characterization equipment, executing experiments and processing experimental results.
o Expert in C++, Visual Basic or other object oriented language.
o Strong analytic skills
o CS or EE with 2+ years experience in PC based code development.
The above job descriptions are written for relatively recent college graduates where it is assumed that finding more senior engineers with direct experience in the desired areas will be difficult. However, if it is possible to get more senior engineers with direct experience, it would be preferred over new grads.
NAND Flash Suppport Circuitry Development Group
Objective: This group will develop circuits to be packaged in multi-die NAND flash packages that add critical functionality and Intelluctual Property (IP) to the chips for use in Solid State Drives (SSD’s). Projects will include developing circuitry for improved signal integrity during reads and writes as well as for simplifying communications to the package.
Deliverables: Circuits that are integrated into multi-die packages to improve chip performance.
Staff:
Senior Silicon packaging engineer. Acts as the intermediary between NAND packaging manufacturing group, and the circuit design engineer.
o 8+ years experience in semiconductor packaging.
Senior analog circuit design engineer. Responsible for specifying, designing and integrating analog circuits packaged with NAND flash multi-die packages.
o 5+ years experience developing and integrating high speed analog circuits.
Senior Digital Design Engineer. Designs stand alone digital circuits
o 5+ years VHDL design
o Layout and routing experience
Test and Verification Engineer.
Technical Leader. Technical mentor for the Brazil teams. Acts as the primary contact for US development teams, providing status, schedule and communicating company information to the local teams.
o Knowledgeable in semiconductor packaging and NAND technology.
o 3+ years of technical management experience.
Contato:
Cleber Figueira
Telefone: 11 4417-7200 r7340
celular: 11 9666-2064
e-mail: cleber.figueira@smart.com
