Rolf Drechsler

University of Bremen at Germany and Director of the Cyber-Physical Systems Group at the German Research Center for Artificial Intelligence (DFKI) in Bremen

Keynotes:

Edge Verification: Ensuring Correctness under Resource Constraints

Abstract: Verification is one of the central tasks in circuit and system design. Since the components are used in several safety critical applications, functional correctness has to be ensured. But due to the increasing complexity, complete verification can often not be ensured.
As a result, modern verification approaches have to cope with limited resources available, like time or computational power of available machines. Analogously to edge computing, resources constraint computing has to be considered in the context of verification, called Edge Verification in the following.
Concepts are presented that allow efficient verification. This might be either by Self-Verification, where the verification hardware is included in the fabricated device, or by Polynomial Verification, where the synthesis process is restricted to guarantee that the generated circuit can be verified in polynomial time. For the later one, a case study is given for efficient polynomial formal verification of totally symmetric functions with short delay.

Rolf Drechsler (www.rolfdrechsler.de) received the Diploma and Dr. phil. nat. degrees in computer science from the Johann Wolfgang Goethe University in Frankfurt am Main, Germany, in 1992 and 1995, respectively. He worked at the Institute of Computer Science, Albert-Ludwigs University, Freiburg im Breisgau, Germany, from 1995 to 2000, and at the Corporate Technology Department, Siemens AG, Munich, Germany, from 2000 to 2001.
Since October 2001, Rolf Drechsler is Full Professor and Head of the Group of Computer Architecture, Institute of Computer Science, at the University of Bremen, Germany. In 2011, he additionally became the Director of the Cyber-Physical Systems Group at the German Research Center for Artificial Intelligence (DFKI) in Bremen. His current research interests include the development and design of data structures and algorithms with a focus on circuit and system design. He is an IEEE Fellow.

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