VOLUME 7 – NÚMERO 1 – ANO 2007
Microelectronics Students Forum 2007
September 3th to 7th, 2007
Rio de Janeiro, RJ - Brazil
CORPO EDITORIAL
Antonio Petraglia – UFRJ
Coordenador geral do evento
Renato Perez Ribas - UFRGS
Coordenador de Programa
Victor Sonnenberg - FATEC-SP
Coordenador de Programa
ARTIGOS
A MPEG-4 DECODER DESIGN
VERIFICATION USING FUNCTIONAL COVERAGE
Leandro M. de L. Silva, Romulo C. P. Camara, Maria de L. N. Neta, Helder F. de A. Oliveira, Fabrício G. L. de
Melo, Karina R. G. da Silva and Elmar U. K. Melcher
ANALYSIS AND MODELING OF
MULTI-PHASE BUCK REGULATORS APPLIED TO MICROPROCESSORS
Fernando Zampronho, Jader De Lima and Jacobus Swart
ANALYSIS AND VALIDATION OF 8
POINT RADIX-2 TIME DECIMATION FFT ALGORITHMIC
Rafael Mallmann and Fernanda Kastensmidt
AUTOMATIC ARCHITECTURE
GENERATION FOR COARSE-GRAINED RECONFIGURABLE ARRAY
Tiago Teixeira, Brian Luppi and Ricardo Ferreira
CHARACTERIZATION OF A ROM
TEST STRUCTURE DESIGNED FOR A SOC FOR IRRIGATION CONTROL
Jose Edil Guimaraes de Medeiros, Gilmar Silva Beserra, Helder Henrique Guimaraes, Adson Ferreira da Rocha and
Jose Camargo da Costa
CHARGE PUMP CURRENT
LIMITATION AND DRIVER
André Luís Mansano, Jader De Lima and Jacobus Swart
COMBINATIONAL BLOCK
GENERATION FOR LIBRARY VALIDATION OF BENCHMARK CIRCUITS
Mateus Gomes, Simone Bavaresco, André Reis and Renato Ribas
COMPARISON OF THE DRAIN
LEAKAGE CURRENT BETWEEN A CONVENTIONAL AND A DOUBLE GATE SOI NMOSFETS AT HIGH TEMPERATURES
Alfonso Gutierrez and Bellodi Marcello
CONFIGURABLE RING OSCILLATOR
FOR LOGIC CELL EVALUATION
Fabio Pereira, Carlos Afonso Silva, Dionatan Moura, Leomar da Rosa Jr., Andre Reis and Renato Ribas
DERIVATIVE APPROXIMATION FOR
ANALOG DESIGN
Marcio Lucks and Nobuo Oki
DOUBLE-EFFICIENCY QUAD-CELL
FOR OPTICAL POSITION SENSING
Pedro Retes, Édilla Fernandes, Luciana Salles, André Furtado and Davies Monteiro
ELECTROMAGNETICS SCATTERING
SIMULATIONS OF SYSTEM-ON-CHIP USING TLM-JSN WITH DIAKOPTICS TECHNIQUE
N. Carvalho Pinheiro, C. Tenório de Carvalho Jr., J. Camargo da Costa and L. R.A.X. de Menezes
FIELD EMISSION DEVICES
ELECTRICAL CHARACTERISTICS TRIAL SYSTEM
Maycon Kopelvski, Michel Dantas, Elisabete Galeazzo, Henrique Peres and Francisco Fernandez
HARMONIC DISTORTION
COMPARISON BETWEEN CIRCULAR GATE AND CONVENTIONAL SOI NMOSFET USING 0.13 µM PARTIALLY-DEPLETED SOI CMOS
TECHNOLOGY
Leandro Dantas and Salvador Gimenez
IPPC: INTELLECTUAL PROPERTY
PROCESSOR COMPONENT APPLIED IN EMBEDDED COMPUTER SYSTEMS
Alexandre Marques Amaral, Márcio Oliveira Soares de Souza and Carlos Augusto Paiva da Silva Martins
LEE: A LEAKAGE ESTIMATION
ENVIRONMENT
Mateus Gomes, Fábio Pereira, Leomar Rosa Jr., André Reis and Renato Ribas
LOGICAL SYNTHESIS FOR
EFFICIENT CMOS TRANSISTOR NETWORK
Dionatan Moura, Caio Alegretti, Leomar da Rosa Jr., André Reis and Renato Ribas
NUMMERICAL ANALYSIS OF
BEVELED STRUCTURES
Felipe Della Lucia and Jacobus Swart
PDESIGNER – A MPSOC MODELING
FRAMEWORK
André Souza, Millena Almeida, Williams Azevedo, Cristiano Araújo, Filipe Rolim and Abel Silva
PLANK TRANSISTOR: A NEW GATE
STRUCTURE TO REDUCE DIE AREA
Vinicius Mello dos Santos and Salvador Pinillos Gimenez
RADIATION INFLUENCE ON SOI
CMOS DEVICES
Marcio Martino, Marcelo Sandri, Paula Agopian, Milene Galeti, Wilhelmus Noije and João Martino
RECONFIGURABLE CORDIC BASED
DIGITAL MODULATOR
Bruno Vitorino, Fernando Sousa and Manoel Jozeane
SET OF DIGITAL CELLS
ACCORDING TO LOGIC EQUIVALENCES
Marcos Ledur, Felipe Marranghello, Leomar Rosa Jr, Andre Reis and Renato Ribas
SHORT-CHANNEL EFFECTS
IMPROVEMENT BY USING DOUBLE-GATE SOI MOSFET
Sara Dereste dos Santos, Michelly de Souza and João Antônio Martino
STUDY OF HIGH TEMPERATURE
INFLUENCE ON HIGH FREQUENCY C-V CHARACTERISTICS OF MOS CAPACITOR
Ana Paula Ziliotto and Marcello Bellodi
THE HALO INFLUENCE ON PD SOI
N-MOSFETS AT LOW TEMPERATURE OPERATION
Julia Maria Arrabaça, Paula Der Agopian and João Martino
THRESHOLD VOLTAGE OF DOUBLE
AND TRIPLE GATE SOI FINFET
Maria Andrade and Joao Martino
TRANSCONDUCTANCE AND
TRANSCONDUCTANCE OVER DRAIN CURRENT RATIO BEHAVIORS IN CIRCULAR GATE SOI NMOSFET BY USING 0.13 µM
PARTIALLY-DEPLETED SOI CMOS TECHNOLOGY
Wellington Silva and Salvador Gimenez
VERIFICATION COVERAGE AND
SYNTHESIS OF AN ETHERNET ASIC
Vitor Righi, Robert Torrel, Marco Hennes, Lucio Prade and Rafael dos Santos