VOLUME 3 – NÚMERO 1 – ANO 2003

Microelectronics Students Forum 2003

September 8th to 11th, 2003
São Paulo, SP - Brazil

CORPO EDITORIAL

Victor Sonnenberg - FATEC-SP
Coordenador geral do evento

COMITÊ DO PROGRAMA

André Inácio Reis – UFRGS
Edna Natividade da Silva Barros – UFPE
Elisabete Galeazzo - LME/USP
Galdenoro Botura Jr. – UNESP
Ivan Saraiva Silva – UFRN
Mauricio M. Oka – LSI/USP
Norian Marranghello – UNESP
Renato Perez Ribas – UFRGS
Ricardo Jacobi – UNB

ARTIGOS

A 0-10DBM, 915-927.5 MHZ, 0.35 ÌM CMOS CLASS E POWER AMPLIFIER WITH DIGITAL POWER CONTROL AND DIRECT MODULATION
Leandro Santana Assunção e José Camargo da Costa

A 8051 µC FUNCTIONAL RTL DESCRIPTION USING SYSTEMC FOR PLATFORM BASED DESIGN
Diogo José Costa Alves, Tiago Sampaio Lins, Silvio Veloso Freire Neto e Edna Barros

A GM-C BUMP EQUALIZER FOR LOW-VOLTAGE APPLICATIONS
R. Galembeck, J. A. de Lima e M. C. Schneider

A LABORATORY IN ANALOG COMMUNICATION SYSTEMS
Pablo Dutra da Silva e Carlos Galup-Montoro

A RAPID PROTOTYPING METHODOLOGY FOR EMBEDDED SYSTEMS DESIGN
Carlos Eduardo Monteiro Rodrigues, Gustavo José Câmara Cavalcanti, Marcus Vinícius Lima e Machado, Paulo Roberto Oliveira Santana Filho, Viviane Cristina Oliveira Aureliano e Manoel Eusébio de Lima

A TINY JPEG DECOMPRESSOR
José Porfírio A. de Carvalho , Roberto Silva Cantanhêde e Ricardo P. Jacobi

AN ASSEMBLER PROGRAM FOR A 16 BIT SOC RISC PROCESSOR
Ryan M. D. Rangel , Juliana Z. F. Diniz , Ricardo R. Linder , Geraldo M. Benício Jr.; Adson F. da Rocha e José C. da Costa

ANALYSIS AND VALIDATION OF A ANALOG COMPARATOR USING CADENCE? ENVIRONMENT
Juan Pablo Martinez Brito, Fernando Paixão Cortes e Sergio Bampi

ANALYTIC MODEL CORRECTION FOR LOW TEMPERATURE TWO-DIMENTIONAL SIMULATION
Sára Elizabeth de Souza Costa e Marcelo Antonio Pavanello

APPLE PARROT: A CIRCUIT PARTITIONER
Diogo Fiorentin, Renato Hentschke e Ricardo Reis

CHARACTERIZATION OF INDUCTIVELY COUPLED ARGON PLASMAS
Bruno S. Rodrigues, Laura Swart e Patrick Verdonck

CMOS RF AMPLIFIER FOR SAW - BASED INTEGRATED SMART SENSOR
Victor Miranda da Silva e Edval J.P. Santos

COMPACT 4-BIT CARRY LOOK-AHEAD ADDER IN MULTIPLE OUTPUT ECDL GATE
Mário C. B. Osório, Renato E. B. Poli, André I. Reis e Renato P. Ribas

COMPARING 2'S COMPLEMENT MULTIPLIERS WITH BINARY AND HYBRID OPERAND ENCODING
Leonardo L. de Oliveira, Marcos Boschetti, Eduardo da Costa, Sergio Bampi e João Baptista

COMPARING SYSTEMC AND ARCHC THROUGH THE MIPS PROCESSOR MODELING
Marcio Rogério Juliato e Paulo Cesar Centoducatte

DEDICATED INSTRUCTIONS TO SUPPORT MULTIPROCESSING ON A EMBEDDED JAVA ARCHITECTURE
Leomar S. Rosa Jr., Antônio C. Beck Filho, Flávio R. Wagner, L.Carro, Alexandre S. Carissimi e André I. Reis

DESCRIBING AND TESTING ARITHMETICAL CIRCUITS IN A FUNCTIONAL LANGUAGE
Frederico A. Mameri, Hélio D. Batista Júnior, Nélio M. M. Alves e Sérgio M. Schneider

DESIGN AND DEVELOPMENT OF A TWO COORDINATE POSITION SENSITIVE PHOTODETECTOR
Ricardo Cunha Gonçalves da Silva e Henri Ivanov Boudinov

DESIGN AND DISCRETE IMPLEMENTATION OF A SIMPLE SIGMA-DELTA ADC
Edgar Mauricio Camacho, Luis Henrique Spiller e Luigi Carro

DESIGN OF ADDER ARCHITECTURES FOR JPEG COMPRESSION
Roger Endrigo Carvalho Porto e Luciano Volcan Agostini

DESIGNING TWO PARALLEL MULTIPLIER ARCHITECTURES FOR DSP
Leomar S. Rosa Jr., Marcos R. Boschetti, Émerson B. Hernandez, André B. Soares, Eduardo Costa, Sergio Bampi

DEVELOPMENT OF A COMB-DRIVE´S FAILURES IDENTIFICATION METHODOLOGY
Daniel Gerhardt, I. Iturrioz e Renato P. Ribas

DEVELOPMENT OF A COMPUTATIONAL TOOL FOR THE EVALUATION OF EMC PARAMETERS IN INTEGRATED CIRCUITS – COMPARISON AMONG SOME CAPACITANCE MODELS
G. S. Beserra , R. M. D. Rangel e L. R. A. X. de Menezes

DEVELOPMENT OF A MICRO-CONTROLLED HEAT SYSTEM APPLIED TO THERMIC WATER BEDS IN HOSPITALS
Jair Lins de Emeri Jr. e Marcelo Bariatto Andrade Fontes

DEVELOPMENT OF A VIRTUAL INSTRUMENT APPLIED TO HEAVY METAL DETECTION IN WATER
Juliana Lopes Cardoso e Marcelo Bariatto Andrade Fontes

ELECTRICAL CHARACTERIZATION OF SOI MOSFET AT HIGH TEMPERATURE
Carolina Davanzzo Gomes dos Santos, João Antonio Martino e Marcelo Antonio Pavanello

ERROR MINIMIZATION OF 2-D DCT AND QUANTIZATION OPERATIONS FOR A GRAY SCALE IMAGES JPEG COMPRESSOR
Bruno Silveira Neves e Luciano Volcan Agostini

FREQUENCY SYNTHESIZER FOR A SYSTEM-ON-CHIP RF TRANSCEIVER
Rafael R. P. Soares e José C. da Costa

GENERAL PURPOSE FOLDED-CASCODE CMOS OPAMP DESIGN
Edgar Mauricio Camacho, Luiz Alberto Pasini Melek e Márcio Cherem Schneider

IMPLEMENTATION OF A CONTINUOUS MODEL OF ADVANCED SOI MOS TRANSISTORS USING MATLAB
Michelly de Souza e Marcelo Antonio Pavanello

IMPLEMENTATION OF ARBITER CIRCUIT FOR ASYNCHRONOUS DESIGN
Rodrigo T. Vaz da Silva, Carlos A. Sampaio, Mário C. B. Osório, André I. Reis e Renato P. Ribas

IMPLEMENTATION OF MONTGOMERY MULTIPLICATION IN A COARSE-GRAINEDED RECONFIGURABLE ARCHITECTURE
Arnaldo Azevedo, Rodrigo Soares e Ivan Saraiva Silva

JHADES: OPEN DESIGN ENVIRONMENT ON JAVA
Ulisses Chieppe, Giliardo Freitas, Cristiano Biancardi e Ricardo Santos Ferreira

LAMPIÃO = LDN - ARQUITETURA DE MICROCONTROLADOR E PROPRIEDADE INTELECTUAL PARA AUTOMAÇÃO
Hércules S. Padilha Jr. e Edval J. P. Santos

LEAD FLUORBORATE GLASSES DOPED WITH ER 3+ FOR OPTOELECTRONIC DEVICES
R. Seragioli, L. R. P. Kassab e L.C.Courrol

LOGIC COMPLETION DETECTION IN PROGRAMMABLE LOGIC DEVICES
Carlos A. Sampaio, Rodrigo T. Vaz da Silva, André I. Reis e Renato P. Ribas

MICROKERNEL FOR NODES OF WIRELESS SENSOR NETWORKS
Vinícius Coelho de Almeida, Breno Augusto Dias Vitorino, Luiz Filipe Menezes Vieira, Marcos Augusto Menezes Vieira, Antônio Otávio Fernandes, Diógenes Cecílio da Silva e Claudionor Nunes Coelho Jr.

MIDDLEWARE FOR WIRELESS SENSOR NETWORKS
Breno A. D. Vitorino, Luiz F. M. Vieira, Marcos A. M. Vieira, Vinícius C. de Almeida, Antônio O. Fernandes, Diógenes C. da Silva e Claudionor N. C. Júnior

MONTE CARLO AND CORNER SIMULATIONS FOR ANALOG VLSI DESIGN
Fernando Paixão Cortes, Alessandro Girardi, Felipe Ródio, Eric Fabris e Sergio Bampi

NEW APPLICATIONS OF THE AUTOMATIC LAYOUT GENERATION TOOL CDF-2
Felipe R. Schneider, João D. Togni, Renato E. B. Poli, Júlio C. Silvello, Renato P. Ribas e André I. Reis

NOISE CHARACTERIZATION OF ANALOG DEVICES
C.D.C. Caetano e C. Galup-Montoro

OPTIMIZATION OF THE MOVE ARCHITECTURE APPLIED TO DSP UTILIZING BIT- SERIAL MULTIPLIERS
Igor Gavazzi Vazzoler, Luigi Carro

PARAMETRIC VHDL MODELS OF ARBITERS FOR NETWORKS-ON-CHIP
Frederico G. M. E. Santo e Cesar A. Zeferino

PLD-BASED GENERATION OF SPECIAL WAVEFORMS WITH LOW THIRD HARMONIC CONTENT
Edval J. P. Santos e Khyale S. Nascimento

SHALLOW N + -P JUNCTIONS IN SI AND SIMOX
M. Dalponte, H. Boudinov e J. P. Souza

SHALLOW P+N-JUNCTION FORMATION IN SI BY PRE-AMORPHIZATION WITH SN
E.M. Scherer e H. Boudinov

SILICON FILM AND FRONT OXIDE THICKNESS EXTRACTION ON SOI DEVICES USING TWO DIFFERENT TECHNIQUES
Michele Rodrigues, A. S. Nicolett e J. A. Martino

STUDY OF DEVICE PARAMETER EXTRACTION IN SOI NMOSFETS
Artur Gasparetto Paiola, Marcelo Antonio Pavanello e João Antonio Martino

STUDY OF THE ETU PROCESSES IN ND3+ DOPED LEAD FLUORBORATE GLASSES
B. L. S. de Lima, L. C. Courrol, L. R. P. Kassab, V. D. Del Cacho, L. Gomes e N. U. Wetter

TEST SCHEDULING AND BENCHMARK IMPLEMENTATIONS FOR THE ANALYSIS OF SOC TESTING
Rodrigo Boccasius, Érika Cota e Marcelo Lubaszewski

XINGÓ: A PROTOTYPING PLATFORM WITH PROCESSING CAPABILITIES
Marcio Rogério Juliato e Paulo Cesar Centoducatte

XROACH: A TOOL FOR GENERATION OF EMBEDDED ASSERTIONS
Márcia C. Marra de Oliveira, José Augusto M. Nacif, Claudionor Nunes Coelho Jr. e Antônio Otávio Fernandes

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